http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20010006641-A

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d7576285d411d00c697e07270d2814a
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-319
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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-3193
filingDate 2000-02-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8f9a047b403b2e0e10ca77b4241eedd6
publicationDate 2001-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20010006641-A
titleOfInvention Test circuit for semiconductor integrated circuit
abstract In the case where the time required for the test of the test circuit is long, and conversely, a configuration in which the test time is shortened, there is a problem that information for specifying a defective point cannot be obtained.n n n On the basis of the comparison result from the comparison circuit 21 for comparing the test result from the test target circuit 1 with the preset expected value, the counter circuit 22 generates a control signal, and the control signal generates a control signal. The operation of the state buffer 23 is controlled. Only when the test result and the expected value do not match, the control signal is output to the corresponding tri-state buffer 23, and only the corresponding test result is output to the outside.
priorityDate 1999-06-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
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Total number of triples: 21.