http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20000011841-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-763 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-038 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02362 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-283 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C23C16-401 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31604 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31625 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C23C16-40 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-763 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-283 |
filingDate | 1999-07-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4b60162bd33ca746e5db8aecf796969a http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c638da42533cda4fbd23dc3b0252dcf5 |
publicationDate | 2000-02-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-20000011841-A |
titleOfInvention | An improved method of forming an arsenic silicon glass film onto a silicon structure |
abstract | The method according to the invention relates to the formation of an Arsenic Silicon Glass (ASG) film on a silicon structure and is very advantageous for the buried plate region forming process in the fabrication of deep trench cell capacitors in EDO and SDRAM memory chips. Is applied. The starting structure is of the state of the art and consists of a silicon substrate covered by a patterned SiO 2 / Si 3 N 4 pad layer that defines a deep trench formed therein by etching. In the early stages of conventional buried plate region formation, the inner sidewalls of the deep trenches are arsenic doped silicon glass produced by co-pyrolysis of TEOS and TEASAT in a vertical high temperature double wall LPCVD reactor as usual. (ASG). According to the invention, the flow rate of O 2 is added so that the co-pyrolysis of TEOS and TEASAT no longer interacts. As a result, the improved process is much better controlled than conventional processes. The ASG film is formed conformally on the structure with a high thickness and arsenic concentration uniformity within the same wafer as well as between the wafers in the lot. |
priorityDate | 1998-07-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 40.