| abstract |
In one embodiment, conductive interconnects 38 are formed in the semiconductor device by depositing dielectric layer 28 on semiconductor substrate 10. Next, dielectric layer 28 is patterned to form interconnecting holes 29. A tantalum nitride barrier layer 30 is then formed in the interconnect hole 29. Next, a catalyst layer 31 having a palladium-tin colloid is formed on the tantalum nitride barrier layer 30. Subsequently, an electroless copper layer 32 is deposited on the catalyst layer 31. Next, an electroplated copper layer 34 is formed on the electroless copper layer 32, and the electroless copper layer 32 acts as a seed layer for the electroplated copper layer 34. Subsequently, portions of the electroplated copper layer 34 are removed to form a copper interconnect 38 in the interconnect hole 29. |