http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-19990061132-A
Outgoing Links
Predicate | Object |
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classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1203 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76264 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823481 |
filingDate | 1997-12-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 1999-07-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-19990061132-A |
titleOfInvention | Manufacturing method of semiconductor device |
abstract | BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a cell and a cell using a silicon on insulator (SOI) structure and a silicon trench isolation (STI) structure. The present invention relates to a technology for improving process yield and reliability by securing process margins by insulating cells between cells and applying back-bias.n n n To this end, the present invention performs an oxygen ion implant process on a P-type semiconductor substrate so that oxygen ions are positioned at a desired depth, and a trench is formed on an SOI structure substrate having a buried oxide film and a silicon layer formed by performing a thermal oxidation process. By forming an STI structure that insulates the cell (P-type semiconductor substrate) and the cell (silicon layer), the back-bias can be applied to solve the problem of bulk floating on the buried oxide layer, thereby ensuring reliability of device operation. It provides a method for manufacturing a semiconductor device. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7049239-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7391096-B2 |
priorityDate | 1997-12-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 17.