http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-19990052941-A
Outgoing Links
Predicate | Object |
---|---|
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4916 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02071 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31116 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32137 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28035 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-306 |
filingDate | 1997-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 1999-07-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-19990052941-A |
titleOfInvention | Metal gate formation method |
abstract | The present invention provides a metal gate forming method for improving the electrical characteristics of a device by minimizing the loss of metal gates due to etching. The method includes forming a first insulating layer, a polysilicon layer, a diffusion barrier layer, a metal layer, Forming a second insulating layer on the first insulating layer; forming a mask pattern by selectively removing the second insulating layer using a plasma containing fluorine; and forming a metal layer and a diffusion preventing layer by using a plasma containing fluorine, a step of selectively etching, using a plasma containing chlorine by selectively etching the polysilicon layer to the metal layer, the diffusion barrier layer, and a step of, H 2 O 2 for forming a side wall protection film on both sides of the polysilicon layer to And performing a cleaning process including the cleaning process. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100792018-B1 |
priorityDate | 1997-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 32.