http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-19990022339-A

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filingDate 1996-06-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fa69b4415e9613317b21edec8fe07f6e
publicationDate 1999-03-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-19990022339-A
titleOfInvention Reduced time delay cumulative for synchronous transfer of data between two mutually asynchronous buses
abstract The interface between the first and second data buses 110 and 120 includes a first bus state device 406 that controls data transfers from the first data bus 110 to the data buffer 132. The interface includes a second bus state device 404 that controls data transfers from the data buffer 132 to the second data bus 120. The data buffer 132 includes a plurality of data storage locations that are accessed based on first in, first out. Each valid data flag 170 for each storage location is set by the first bus state device 406 when the data is stored from the first data bus 110 to the storage location 132 and the data is stored in the storage location ( Cleared by second bus state device 404 when transmitted from 132 to second data bus 120. To ensure that the data valid flags 170 change synchronously for each state device, the data valid flags 170 are associated with the first and second bus state devices 406 and 404 respectively. Synchronized to the second bus clocks. Each data valid flag 170 is independently synchronized to reduce the time required to output sequential data from multiple data locations in the data buffer 132.
priorityDate 1995-06-07-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 26.