| abstract |
According to an embodiment of the present disclosure, a substrate including a cell region and a peripheral region, a cell gate structure disposed on the cell region, a first impurity region and a second impurity region disposed in the cell region on both sides of the cell gate structure, are provided. 2 impurity regions; a bit line structure disposed on the cell gate structure, intersecting the cell gate structure, and connected to the first impurity region; a peripheral gate structure disposed on the peripheral region; a peripheral capping layer covering the peripheral gate structure and having a top surface substantially at the same level as an upper end of the bit line structure; and a cell contact structure, wherein the conductive barrier covers an upper end of the bit line structure. |