http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102308621-B1
Outgoing Links
Predicate | Object |
---|---|
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1288 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-127 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1233 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-32 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-335 |
filingDate | 2014-07-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2021-10-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2021-10-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-102308621-B1 |
titleOfInvention | Thin film transistor array panel and method of manufacturing the same |
abstract | A thin film transistor display panel is provided. A thin film transistor array panel according to an embodiment of the present invention includes a substrate including a display region and a peripheral region, a first semiconductor layer positioned on the substrate, a first semiconductor layer positioned in the display region, and a second semiconductor layer positioned in the peripheral region, and the a first semiconductor layer and a protective film disposed on the second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer include an oxide semiconductor, and the thickness of the first semiconductor layer and the second semiconductor layer is different from each other |
priorityDate | 2014-07-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 25.