http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102213410-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-017 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K5-1565 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03C3-0991 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K5-135 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-0231 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-07 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-0315 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03C3-0966 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K3-0231 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K5-156 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K5-135 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K3-017 |
| filingDate | 2019-08-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2021-02-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2021-02-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-102213410-B1 |
| titleOfInvention | Clock duty cycle adjustment and calibration circuit and method of operating same |
| abstract | The clock circuit includes a set of level shifters, and an adjustment circuit and a calibration circuit. The set of level shifters is configured to output a first set of phase clock signals having a first duty cycle and coupled to the adjustment circuit. The adjustment circuit generates a first clock output signal in response to a first phase clock signal and a second phase clock signal of the first set of phase clock signals, and a first clock output signal and a first clock in response to the set of control signals. Configured to adjust the second duty cycle of the output signal. The calibration circuit is coupled to the adjustment circuit and is configured to perform duty cycle calibration of a second duty cycle of the first clock output signal based on the input duty cycle, and to generate a set of control signals in response to the duty cycle calibration. |
| priorityDate | 2018-08-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 42.