http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102195175-B1

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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-133
filingDate 2014-06-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2020-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2020-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-102195175-B1
titleOfInvention Display Device
abstract In the present invention, in a GIP-driven display device using a clock signal including a dummy clock pulse synchronized with a start signal pulse for stabilization of a gate output signal, the polling timing of the start signal is equal to or greater than the polling timing of the dummy clock pulse. In order to be delayed, by forming a start signal wiring capacitor pattern related to the start signal (VST) wiring in the display panel, the picture quality deterioration due to the mismatch of the polling timing of the start signal pulse VST and the dummy clock pulse DMY CLK is prevented. Can be prevented.
priorityDate 2014-06-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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