http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102053864-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06N20-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F8-53 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F8-53 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06N99-00 |
| filingDate | 2018-03-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2019-12-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2019-12-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-102053864-B1 |
| titleOfInvention | Method and Apparatus for FPGA Bitstream Reverse-Engineering Based on Machine Learning |
| abstract | The present invention relates to a field programmable gate array (FPGA) bitstream reverse engineering method and apparatus. In the machine learning-based FPGA bitstream reverse engineering method according to the present invention, a logic primitive and a constraint that can express the logic of the bitstream are selected, and the bitstream is obtained using a predetermined utility. Generating a; Extracting and compressing configuration data defined as bitstream data for the logic; And inputting a data set resulting from the extraction and compression of the configuration data into a predetermined machine learning model to perform machine learning and reverse engineering. |
| priorityDate | 2018-03-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 25.