http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102023778-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0416 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-70 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-105 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-34 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-40 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-105 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-40 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-34 |
| filingDate | 2011-12-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2019-09-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2019-09-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-102023778-B1 |
| titleOfInvention | Semiconductor device and semiconductor memory device |
| abstract | The present invention lengthens the data retention period in the memory circuit. In addition, power consumption is reduced. In addition, the circuit area is reduced. It is also an object to increase the number of times the data can be read for one data write. In order to solve this problem, a memory circuit is provided, and the memory circuit includes a first field effect transistor having a data signal input to one of a source and a drain, and a gate electrically connected to the other of the source and the drain of the first field effect transistor. And a rectifying element having a two field effect transistor and a pair of current terminals, and one of the pair of current terminals electrically connected to a source or a drain of the second field effect transistor. |
| priorityDate | 2010-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 42.