http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102023602-B1
Outgoing Links
Predicate | Object |
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classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0274 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-002 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-039 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-028 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-027 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G03F7-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G03F7-039 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L49-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G03F7-028 |
filingDate | 2018-09-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2019-09-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2019-09-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-102023602-B1 |
titleOfInvention | Manufacturing method for chip inductor and photosensitive material used in the method |
abstract | BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a laminated chip inductor having a high definition line width, and a method of manufacturing a stacked chip inductor in which a plurality of electrode patterns are stacked with a dielectric layer interposed therebetween. After applying the sieve paste, a pattern is formed by a photolithography process, and the process of forming the dielectric layer is performed by applying a photosensitive dielectric paste on the electrode pattern and then forming a via hole connected to the electrode pattern by a photolithography process. In the process of applying the photosensitive conductor paste, the photosensitive conductor paste fills via holes formed in the dielectric layer, so that the lower electrode pattern and the upper electrode pattern are electrically connected to each other. The present invention has the effect of being able to manufacture a multilayer chip inductor having more precision, durability and stability by using a photosensitive conductor material and a photosensitive dielectric material. |
priorityDate | 2017-09-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 28.