| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-0271
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B2260-023
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B2260-046
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B2307-308
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73204
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B2457-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B2305-076
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-32225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B2307-558
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16227
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-0191
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B2307-734
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B2262-101 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-03
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-46
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B5-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B5-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B15-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49827
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49822
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49894
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-4644 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B32B15-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-46
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B32B5-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-03 |
| filingDate |
2012-04-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2019-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2019-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-101953404-B1 |
| titleOfInvention |
Laminated board, circuit board, semiconductor package, and method for manufacturing laminated board |
| abstract |
A laminated board in which a plurality of prepregs each having a fiber base layer and a resin layer are laminated and a wiring layer is formed on an upper side or a buildup layer is formed, The distance between the center line A1 of the first fiber substrate layer 101 and the center line A3 of the second fiber substrate layer 101a adjacent to the first fiber substrate layer 101 is D1, D2 is the distance between the center line A2 of the third fiber base layer 105 closest to the third fiber base layer 105 and the center line A4 of the fourth fiber base layer 105a adjacent to the third fiber base layer 105 (1) and (2) satisfy the following conditions when the thickness of the laminate is D3 and the number of the fiber base layers in the laminate is n The laminate 100c. D3 / n < D1 (1) D3 / n < D2 (2) |
| priorityDate |
2011-04-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |