http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101929770-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-045 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-22 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1006 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0688 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-14 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C5-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-22 |
| filingDate | 2012-03-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2018-12-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2018-12-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-101929770-B1 |
| titleOfInvention | Memory circuit, memory unit, and signal processing circuit |
| abstract | The present invention provides a storage circuit capable of holding data even after supply of a power supply voltage is stopped, and a signal processing circuit capable of reducing power consumption. The storage circuit has a transistor, a capacitive element, a first arithmetic circuit, a second arithmetic circuit, a third arithmetic circuit, and a switch, and the output terminal of the first arithmetic circuit is connected to the input terminal of the second arithmetic circuit The input terminal of the second arithmetic circuit is electrically connected to the output terminal of the third arithmetic circuit through a switch and the output terminal of the second arithmetic circuit is electrically connected to the input terminal of the first arithmetic circuit, The input terminal of the first arithmetic circuit is electrically connected to one of the source and the drain of the transistor and the other of the source and the drain of the transistor is connected to one of a pair of electrodes of the capacitive element, And the channel of the transistor is formed in the oxide semiconductor layer. |
| priorityDate | 2011-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 67.