http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101921334-B1

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filingDate 2012-02-09-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2018-11-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2018-11-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-101921334-B1
titleOfInvention Memory circuit
abstract It is an object of the present invention to provide a memory circuit of a signal processing apparatus capable of suppressing power consumption by short-time power supply stop and initializing it without causing a malfunction at power-on restart. While the power is not supplied to the memory circuit, the data signal stored in the volatile memory unit is held in the nonvolatile memory unit. In the nonvolatile memory section, by using a transistor having an extremely small off current, the data signal held in the capacitor element is held for a long period of time. In this way, the nonvolatile storage unit maintains the logical state even when the supply of power is stopped. The data signal retained in the capacitive element at the time of the power-off is set to a potential that does not cause a malfunction by turning the reset circuit into a conduction state at the time of power resumption.
priorityDate 2011-02-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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