http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101847063-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136236 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136286 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1288 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1368 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-136 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1368 |
| filingDate | 2011-09-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2018-05-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2018-05-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-101847063-B1 |
| titleOfInvention | Method of fabricating array substrate |
| abstract | Forming a gate wiring extending in one direction on a substrate having a pixel region and a switching region in the pixel region and forming a gate electrode connected to the gate wiring in the switching region; Forming a gate insulating film over the gate wiring and the gate electrode; Forming an oxide semiconductor layer on the gate insulating film in correspondence to the gate electrode; Sequentially stacking a first metal layer and a second metal layer over the oxide semiconductor layer; Forming a first photoresist pattern of a first thickness over the second metal layer and a second photoresist pattern of a second thickness thinner than the first thickness; The second metal layer exposed to the outside of the first and second photoresist patterns and the first metal layer below the first and second photoresist patterns are patterned to form a data wiring of a double layer structure crossing the gate wiring, Forming a source / drain pattern having a bilayer structure of the source / drain regions; Removing the second photoresist pattern to expose a center portion of an upper layer of the source drain pattern; Subjecting the upper layer of the exposed source drain pattern to a material change by plasma treatment; Removing an upper layer of the source drain pattern having the material changed; Forming a source electrode and a drain electrode in a double layer structure on the oxide semiconductor layer by dry etching and removing a lower layer of the exposed source drain pattern by removing an upper layer of the source drain pattern that has been modified; Forming a protective layer having a drain contact hole exposing the drain electrode over the entire surface of the data line; And forming a pixel electrode in the pixel region in contact with the drain electrode through the drain contact hole on the protection layer. |
| priorityDate | 2011-09-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 38.