| abstract |
The microelectronic package 100 includes a substrate 102 and a microelectronic element 130 that includes at least one column 138,139 of the contact 132 exposed at this side And the contact 132 is viewed and connected to the corresponding contact exposed at the surface 120 of the substrate. The axial surface 140 intersects the plane of the microelectronic element along a line extending in the first direction 142 and may be centered relative to the column of the element contact 132. The package terminals columns 104A and 104B may extend in a first direction. The first terminal exposed in the central region 112 of the second surface may be configured to convey address information available for determining an addressable memory location in the microelectronic element. The central region 112 may have a width 152 that is no greater than 3.5 times the minimum pitch 150 between the columns of the package terminals. The axes can intersect the central area. |