http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101694768-B1
Outgoing Links
Predicate | Object |
---|---|
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R1-0441 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R1-07392 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2601 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2863 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R1-0735 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R1-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R1-073 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26 |
filingDate | 2015-03-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2017-01-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2017-01-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-101694768-B1 |
titleOfInvention | Semiconductor test socket and manufacturing method thereof |
abstract | The present invention relates to a semiconductor test socket and a method of manufacturing the same. A semiconductor test socket according to the present invention comprises: an insulating main body having elasticity; An insulating sheet disposed in the insulating body so as to be spaced apart from each other in the transverse direction; A plurality of conductive patterns spaced apart from each other along a depth direction on one surface of each of the insulating sheets; A plurality of upper conductive pins each having one side attached to an upper edge region of each of the conductive patterns and the other side exposed to an upper surface of the insulating body; And a ground sheet which is attached to a central region in a vertical direction on the other surface of the insulating sheet and which is formed along the depth direction and which can be electrically grounded. Accordingly, the disadvantages of the pogo-pin type semiconductor test socket and the disadvantages of the PCR socket type semiconductor test socket can be overcome, so that it is possible to overcome the thickness limitation in the up and down direction while implementing the fine pattern. In addition, in manufacturing semiconductor test sockets, it is possible to improve the accuracy of testing by realizing more efficient grounding in the actual semiconductor testing process while providing convenience of manufacturing. |
priorityDate | 2015-03-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 22.