http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101629194-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02D10-00 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-0375 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-096 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-0016 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-096 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K3-037 |
| filingDate | 2010-10-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2016-06-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2016-06-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-101629194-B1 |
| titleOfInvention | Logic circuit and semiconductor device |
| abstract | In the logic circuit in which clock gating is performed, standby power is reduced or malfunctions are suppressed. The logic circuit includes a transistor in an off state where a potential difference exists between the source terminal and the drain terminal during a period when the clock signal is not supplied. The channel forming region of the transistor is formed using an oxide semiconductor whose hydrogen concentration is reduced. Specifically, the hydrogen concentration of the oxide semiconductor is 5 x 10 19 (atoms / cm 3 ) or less. Therefore, the leakage current of the transistor can be reduced. As a result, in the logic circuit, reduction of standby power and suppression of malfunction can be achieved. |
| priorityDate | 2009-10-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 38.