http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101614580-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0922 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823807 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823857 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0649 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823878 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823857 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823807 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26513 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66477 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823814 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7833 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6659 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-167 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0922 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823412 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76224 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate | 2013-08-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2016-04-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2016-04-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-101614580-B1 |
| titleOfInvention | Semiconductor device and manufacturing method of semiconductor device |
| abstract | The present invention relates to improving the performance of a MOS transistor in a semiconductor device and a manufacturing method thereof. A step of implanting a first impurity into the first region I n of the semiconductor substrate 1, a step of forming a semiconductor layer 28 on the semiconductor substrate 1, a step of forming the semiconductor layer 28 and the semiconductor substrate 1 ) for forming a groove (1b), home (step of implanting second impurities into the second region ⅱ n of the process, a semiconductor layer 28 for forming the element isolation insulating film 34 in 1b) and , the first gate insulating film 40 and first gate electrode (42a) a second gate insulating film 36 and the second gate electrode (42b) to the process, and a second region ⅱ n of forming the first region ⅰ n A step of forming a first source region 62 and a first drain region 64 on both sides of the first gate electrode 42a and a step of forming a first gate electrode 42a on both sides of the second gate electrode 42b, And a step of forming a source region (70) and a second drain region (72). |
| priorityDate | 2012-08-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 33.