http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101255121-B1
Outgoing Links
Predicate | Object |
---|---|
classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48091 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73265 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-48 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-62 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-60 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-64 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-642 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-48 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-64 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-60 |
filingDate | 2011-08-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2013-04-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2013-04-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-101255121-B1 |
titleOfInvention | Light emitting diode package and its manufacturing method |
abstract | The present invention provides a light emitting diode package using a heat dissipation substrate having a multilayer reflective surface and extending the wiring pattern layer to the bottom bottom surface of the chip mounting region to secure the chip bonding process and reduce the package thickness. The method relates to a manufacturing method, comprising: a reflective groove having an upper opening having a width greater than the lower bottom surface and a lower bottom surface, and having an inclined surface formed between the upper opening and the lower bottom surface, and a lower bottom surface and a lower bottom surface inside the reflective groove. A heat dissipation substrate having mounting grooves having an upper opening having a large width and having an inclined surface formed between the upper opening and the bottom bottom surface; an insulating layer selectively formed on the heat dissipation substrate and an insulating layer formed on the insulating layer and A wiring pattern layer extending to a bottom surface and selectively formed; a light emitting die mounted in the mounting groove De chip; include; molded layer to be formed around the light emitting diode chip. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101321887-B1 |
priorityDate | 2011-08-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 35.