http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101099942-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-09363 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-107 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-0723 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-027 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-108 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-244 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B23K101-42 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B23K26-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C25D7-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B23K26-36 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-24 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C25D5-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-00 |
| filingDate | 2008-11-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2011-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2011-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-101099942-B1 |
| titleOfInvention | Circuit board and manufacturing method |
| abstract | The circuit board includes an insulating substrate 1 and a circuit 3 formed on the insulating substrate 1, and the circuit is formed on a metal thin film 2 coated on the surface of the insulating substrate 1. Plating base layer 4 in which a circuit pattern is formed by irradiating the laser L along the outline of 3) and partially removing the metal thin film 2 from the outline of the circuit 3, and this plating base layer. Gold (Au) between the copper (Cu) plating layer 5, the nickel (Ni) plating layer 6, and the gold (Au) plating layer 7 formed on the surface of (4) by metal plating sequentially from the plating base layer side. Is formed in contact with the gold (Au) plating layer, and the standard electrode potential is ear to the metal of the first intermediate plating layer. A second intermediate plating layer 9 having a metal of) is formed in contact with the first intermediate plating layer 8. |
| priorityDate | 2007-11-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 50.