http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101053323-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-09 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-05 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823864 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-82385 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-146 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14609 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14689 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-146 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 |
| filingDate | 2003-05-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2011-08-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2011-08-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-101053323-B1 |
| titleOfInvention | Semiconductor device, manufacturing method thereof, and electronic device |
| abstract | The present invention provides a CMOS type solid-state image pickup device, an image pickup area such as a DRAM mixed logic LSI, an image pickup area in which an LDD structure MOS transistor is formed without a metal silicide layer, a region such as a DRAM cell, and the like, and a MOS having an LDD structure having a metal silicide layer. A semiconductor device capable of forming a region of a logic circuit portion in which a transistor is formed on a single semiconductor chip, a manufacturing method thereof, and an electronic device equipped with the semiconductor device are provided. According to the present invention, in a region in which a metal silicide layer is formed using a plurality of insulating films, a sidewall of the gate electrode is formed as an etchback to a plurality of insulating films or a single layer film, and a region in which the metal silicide layer is not formed. In the semiconductor device, a sidewall formed by an upper insulating film is formed on the lower insulating film covering the surface, or a plurality of insulating films are left as they are. n n CMOS solid-state image pickup devices, sidewalls, silicide layers, gate electrodes, field effect transistors |
| priorityDate | 2002-05-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.