http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101051488-B1

Outgoing Links

Predicate Object
classificationCPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-49107
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48091
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73265
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-62
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-48
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-62
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-48
filingDate 2009-01-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2011-07-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2011-07-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-101051488-B1
titleOfInvention Method for manufacturing light emitting diode unit, and light emitting diode unit manufactured by this method
abstract According to an embodiment of the present invention, an upper conductive layer having a positive electrode pattern and a negative electrode pattern is formed on an upper surface of an insulating substrate, and a thermal conductive layer for heat dissipation is formed on a lower surface of the insulating substrate. A first step of preparing an upper substrate having openings formed between the conductive layer and the upper conductive layer serving as the negative electrode pattern; A second process of preparing a lower substrate having upper and lower thermal conductive layers formed on upper and lower surfaces of the insulating substrate for heat dissipation; A third step of adhering the upper substrate and the lower substrate through an adhesive layer; A fourth step of mounting a light emitting diode chip on the adhesive layer in the opening of the upper substrate; A fifth step of wire-bonding the N-type pad and the P-type pad of the light emitting diode chip to the upper conductive layer, wherein the upper electrode conductive layer becomes a positive electrode pattern and a negative electrode pattern; A method of manufacturing a light emitting diode unit comprising a sixth step of epoxy molding an opening and a wire bonding portion of the upper substrate, and a light emitting diode unit manufactured by the method.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10043784-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9865577-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9343448-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11373986-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9214494-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9599857-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9111464-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9159700-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9029880-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9559142-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9178123-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10784236-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/GB-2522816-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/GB-2522816-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9620487-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2014093063-A1
priorityDate 2009-01-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2008053718-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20090001849-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20090072644-A
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419526573
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID74483

Total number of triples: 36.