http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101033223-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40117 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0206 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66833 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247 |
| filingDate | 2008-03-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2011-05-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2011-05-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-101033223-B1 |
| titleOfInvention | Method of forming a nonvolatile memory device having a charge trap layer |
| abstract | A method of forming a nonvolatile memory device having a charge trap layer according to the present invention includes: forming a tunneling layer on a semiconductor substrate; Forming a charge trap layer over the tunneling layer; Performing an oxidation process on the charge trap layer to densify the charge trap layer while converting a predetermined thickness of the charge trap layer into an oxide film; Performing cleaning to remove the oxide film formed in the oxidation process and the interface film formed on the charge trap layer; Forming a blocking film on the charged charge trap layer; Forming a shielding layer on the blocking film; Forming a control gate electrode and a low resistance layer on the shielding layer; And patterning the resistive layer, the control gate electrode, the shielding layer, the blocking layer, the charge trap layer, and the tunneling layer to form a gate stack.n n n n Charge trapping layer, radical oxidation, operating speed |
| priorityDate | 2008-03-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 40.