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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4074
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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-408
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4074
filingDate 2008-01-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2009-08-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2009-08-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-100914017-B1
titleOfInvention Memory controller, access control method and system of semiconductor memory
abstract An object of the present invention is to efficiently perform a precharge operation of a plurality of banks and to improve access efficiency of a semiconductor memory. n The memory controller sequentially holds access requests including access addresses. The semiconductor memory is composed of a plurality of banks each having a plurality of pages. The memory controller determines the page hit / page miss of the bank corresponding to each of the held access addresses. The memory controller outputs an all bank precharge command for performing precharge operations for all banks when it is determined that the access efficiency is improved by analyzing successive access addresses. Since a plurality of banks can be precharged by one all-bank precharge command, even when there are few empty cycles for inserting a command, the command can be efficiently supplied to the semiconductor memory according to the state of the bank.
priorityDate 2007-02-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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