http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100864917-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2330-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0297 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2320-0276 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3614 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0281 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-027 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3688 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-133 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1345 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-133 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09F9-00 |
| filingDate | 2001-11-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2008-10-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2008-10-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100864917-B1 |
| titleOfInvention | Data driving device and method of liquid crystal display |
| abstract | The present invention relates to a data driving apparatus and method of a liquid crystal display device capable of reducing the number of digital-to-analog conversion integrated circuits and tape carrier packages by time-divisionally driving the digital-to-analog converters and integrating them separately from the output buffer units.n n n According to an aspect of the present invention, there is provided a data driving apparatus of a liquid crystal display device, comprising: digital-to-analog conversion integrated circuits for converting n input pixel data into a pixel voltage signal and dividing the pixel data into two parts; N-channel channels, each of which is supplied from a digital-analog converter integrated circuit, is divided into two pixel lines and supplied with n data lines, and at least two are commonly connected to each of the digital-analog converter integrated circuits. Output buffer integrated circuits; Control the digital-to-analog converter integrated circuits and the output buffer integrated circuits, and rearrange 2n pixel data to be supplied to each of the digital-to-analog converter integrated circuits corresponding to the order of supply to the at least two output buffer integrated circuits, n Timing control means for time-dividing and supplying the data into at least two sections composed of pixel data of each unit; The digital-analog conversion integrated circuit is mounted on a tape carrier package connected to the liquid crystal panel; The output buffer integrated circuit is mounted on the liquid crystal panel. |
| priorityDate | 2001-11-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 32.