http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100847409-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B82Y10-00 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B99-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B69-00 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8246 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-115 |
| filingDate | 2005-02-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2008-07-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2008-07-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100847409-B1 |
| titleOfInvention | NRM memory cell structure and method for forming same, NAD architecture NRM memory cell string and method for forming same |
| abstract | NROM EEPROM memory devices and arrays are described that facilitate the use of vertical NROM memory cells and select gates in NOR or NAND high density memory architectures. The memory embodiments of the present invention use vertical select gates and NROM memory cells to form NOR and NAND NROM architecture memory cell strings, segments, and arrays. These NROM memory cell architectures allow for improved high density memory devices or arrays with integrated select gates that semiconductor fabrication processes can typically use processable feature sizes but do not suffer from charge separation problems in typical multi-bit NROM cells. . These memory cell architectures also allow for mitigation of disturbance and over erasure problems by placing NROM memory cells behind select gates that separate NROM memory cells from their associated bit / data lines and / or source lines. n n Integrated Circuits, EEPROM Memory Devices, Vertical NROM Memory, Pillars, Trench, Disturb, Overerasure, Charge Separation |
| priorityDate | 2004-02-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 20.