http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100830997-B1

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e5081169b8c991da399d70ac59c69101
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02634
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-205
filingDate 2006-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2008-05-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_95a21e25538eab0fa8290f072626e710
publicationDate 2008-05-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-100830997-B1
titleOfInvention Silicon epitaxial wafer manufacturing method with improved flatness
abstract A method of manufacturing a silicon epitaxial wafer with improved flatness is provided. In the silicon epitaxial wafer manufacturing method according to the present invention, the silicon epitaxial wafer manufacturing method comprising the step of depositing a silicon epitaxial layer on a silicon polished wafer (polished wafer), the silicon during the CVD deposition of the silicon epitaxial layer The final flatness is improved by adjusting the thickness profile of the epitaxial layer to compensate for the roll-off of the silicon polished wafer.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101810643-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2017135604-A1
priorityDate 2006-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 25.