http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100829374-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76224 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31053 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0206 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31144 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-76 |
| filingDate | 2002-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2008-05-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2008-05-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100829374-B1 |
| titleOfInvention | Sonos semiconductor device manufacturing method |
| abstract | The present invention provides a method for manufacturing a sonos semiconductor device that can eliminate the step between the cell region and the logic region in forming the STI of the logic region in the sono process, the pad oxide film on the semiconductor substrate to form the element isolation region A nitride film is formed, a trench is formed through a known exposure process and an etching process, and an NSG is applied to the trench, followed by polishing to perform first planarization; Second planarization is performed by applying and polishing an oxide having a fluidity higher than that of the NSG on the first CMP; Performing wet etching and cleaning after the second planarization to remove the nitride film and the oxide film remaining after the second CMP to expose the device isolation region and the surface of the semiconductor substrate; After the cleaning step, the oxide film, the nitride film, and the oxide film are sequentially deposited, a photoresist pattern is formed thereon, and then the etching is performed to the surface of the substrate using the photoresist pattern as a mask. Nitride, oxide); And depositing poly on the remaining semiconductor substrate, and removing some of the poly by an exposure process.n n n n Semiconductor, SONOS, NSG, SOG, CMP |
| priorityDate | 2002-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 19.