http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100828622-B1

Outgoing Links

Predicate Object
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C30B25-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C30B29-06
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-20
filingDate 2007-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2008-05-09-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2008-05-09-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-100828622-B1
titleOfInvention Epitaxial coated silicon wafer
abstract The present invention provides a method of manufacturing an epitaxially coated silicon wafer, the method comprising: providing a plurality of silicon wafers having at least a front surface polished, each of the provided silicon wafers being placed on a susceptor in an epitaxy reactor, the first step In a hydrogen atmosphere, in a second step by pretreatment by adding an etching medium to the hydrogen atmosphere, followed by a series of processes to epitaxially coat the polished entire surface, and to remove the coated silicon wafer from the epitaxy reactor, Each silicon wafer is successively coated, and then the susceptor is heated to a temperature of at least 1,000 ° C. under a hydrogen atmosphere, and after a predetermined number of epitaxial coatings, the susceptor is etched and the susceptor with silicon is temporarily Regarding the method characterized by performing the coating . n The invention also comprises a silicon wafer comprising a front surface and a back surface, at least the front surface being polished, and having an epitaxial layer formed on the front surface, the average cross section determined by thickness measurement with respect to a baseline determined by a regression method. The parameter R30-1 mm is from -10 nm to +10 nm in response to a deviation of (value determined at a distance of 1 mm from the edge of the silicon wafer). n n Silicon Wafers, Epitaxial Coating, Susceptors, Line Scan, Roll-Off, Roll-up
priorityDate 2005-09-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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Total number of triples: 22.