http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100803565-B1
Outgoing Links
Predicate | Object |
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classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136286 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-134309 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78672 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-136 |
filingDate | 2001-08-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2008-02-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2008-02-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-100803565-B1 |
titleOfInvention | Array Board for Liquid Crystal Display |
abstract | The present invention relates to an array substrate comprising a thin film transistor made of polycrystalline silicon.n n n As liquid crystal displays have become larger and higher in resolution, low-resistance materials are required as wiring materials. Even when aluminum or aluminum alloy materials having relatively small specific resistances are used as wiring materials, the thickness is made thicker than a certain thickness to reduce the resistance of the wiring. Should be. Accordingly, in order to improve the step coverage, the thickness of the interlayer insulating film on the upper portion of the gate electrode must also be thick. Therefore, there is a problem in that the process becomes long and a defect is likely to occur when forming the contact hole.n n n In the present invention, copper is used as the gate electrode and the gate wiring, and boron ions are implanted into the gate electrode and the gate wiring, so that the thickness of the gate electrode and the gate wiring can be formed to be 2,000 Å or less. It can be reduced from 3,000 kPa to 4,000 kPa. Therefore, it is possible to reduce the time used for the deposition and etching of the interlayer insulating film, to prevent the occurrence of defects during etching, and to prevent the oxidation of copper by boron ions.n n n n Copper Wiring, Signal Delay, Low Resistance |
priorityDate | 2001-08-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 28.