http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100604829-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61F2007-0045 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2320-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61F2007-0095 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61H2205-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61F2007-0086 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05B2203-004 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G05D23-19 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05B3-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3685 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61F7-007 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61H39-04 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G5-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-133 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36 |
| filingDate | 2004-01-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2006-07-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2006-07-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100604829-B1 |
| titleOfInvention | Display device |
| abstract | Disclosed is a display apparatus having a plurality of source drivers connected with a timing controller and a serial cascade. First, second and third buses are connected between the timing controller and a first source driver among a plurality of source drivers connected by the serial cascade. During a first period, a clock signal is transmitted through the first bus, a first operation control signal is transmitted through the second bus, and a second operation control signal is first from a plurality of data lines constituting the third bus. The data signal is transmitted through the data line and the polarity control signal is transmitted through the second data line among the plurality of data lines. In addition, during the second period, the clock signal is transmitted through the first bus, the first operation control signal is transmitted through the second bus, and the second operation control signal comprises a plurality of data constituting the third bus. It is transmitted through one of the data lines. The source driver generates a data start signal and a load signal based on a combination of the state of the first operation control signal and the state of the second operation control signal in each section. Therefore, the display device according to the present invention can reduce the number of signal lines for transmitting signals.n n n n TFT-LCD |
| priorityDate | 2004-01-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID414387100 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID23663404 |
Total number of triples: 26.