http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100585085-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4093 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1057 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-106 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4096 |
| filingDate | 2000-06-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2006-05-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2006-05-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100585085-B1 |
| titleOfInvention | Data transfer circuit provided in the data read path of the high speed memory device |
| abstract | A data transfer circuit provided in a data read path of a high speed memory device is disclosed. A data transfer circuit provided in a data read path of a high speed memory device according to the present invention is a data transfer circuit provided in a read path of a high speed memory device having a pipelined structure, and receives input data in response to a predetermined clock signal. At least one tri-state buffer latch circuit for buffering and latching, wherein the tri-state buffer latch circuit inputs a clock signal and an inverted clock signal as a control signal, and inverts and buffers the input data in response to the control signal. And latching output signals of the inverter and the tri-state inverter and outputting latched data when the output of the tri-state inverter is floated.n n n According to the present invention, by implementing a tri-state buffer with a minimum delay in the data read path of a high-speed memory device having a pipelined structure, skew between data can be minimized, and stable high speed can be achieved without damaging the data. The effect is that data transfer can be performed. |
| priorityDate | 2000-06-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 40.