http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100564551-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-409 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-063 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-407 |
| filingDate | 1999-06-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2006-03-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2006-03-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100564551-B1 |
| titleOfInvention | Semiconductor memory device with multiple inputs and outputs |
| abstract | A semiconductor memory device having multiple inputs and outputs is provided. A semiconductor memory device having multiple inputs and outputs is a semiconductor memory device having m memory cell groups and n × m (n and m are integers of 2 or more) input and output terminals. Including the first multiplexers for outputting the i-th data (i is an integer greater than or equal to 1) of each memory cell group to m adjacent I / O terminals, the chip size can be reduced by drastically reducing the busing area. There is this.n n n n DRAM, Graphics Memory, SRAM, Multiple, I / O |
| priorityDate | 1999-06-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID414858099 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID5017 |
Total number of triples: 14.