http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100504761-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L7-0335 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L27-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L7-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L7-0029 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L27-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L7-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L7-00 |
| filingDate | 1997-09-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2005-07-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2005-07-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100504761-B1 |
| titleOfInvention | Component Timing Recovery System for QAM |
| abstract | A receiver is for a transmitted quadrature amplitude modulated (QAM) signal representing a continuous symbol and comprising an in-phase (I) component and a quadrature (Q) component. The timing recovery system includes a source 102 of samples representing a QAM signal generated at a fixed frequency. A processing circuit for the I component is connected to the sample source, and has a first demodulator 104 for demodulating the I component of the QAM signal to baseband, and takes a time in response to the control signal and synchronized with the transmission symbol. A first interpolator 108 for generating an I component sample. A processing circuit for the Q component is also connected to the sample source and at a time in response to a control signal and a second demodulator 114 for demodulating the Q component of the QAM signal into a base band, in synchronization with the transmission symbol. And a second interpolator 118 to produce a taken Q component sample. Phase error detector 126 detects a phase error between the sample time of the I and Q component samples from the first and second interpolators and the time of successive transmitter symbols. The adder 130 is connected to a phase error detector and a source of a nominal delay signal. Numerical control delay circuit 132 is connected to the adder to generate respective control signals for the first and second interpolators. |
| priorityDate | 1996-09-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 19.