http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100403197-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76873 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31053 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76807 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76819 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
| filingDate | 2001-06-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2003-10-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2003-10-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100403197-B1 |
| titleOfInvention | Method of forming a metal wiring in a semiconductor device |
| abstract | BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming metal wirings in a semiconductor device. In the process of forming a metal wiring by embedding a metal material in a dual damascene pattern formed of a trench and a contact hole, the metal seed layer is formed only on sidewalls and bottom surfaces of the dual damascene pattern. After forming the metal wires inside the dual damascene pattern by metal plating to minimize the thickness of the entire film including the metal plating layer to be removed by chemical mechanical polishing to complete the chemical mechanical polishing process in a short time to chemical mechanical polishing Disclosed is a method of forming a metal wiring of a semiconductor device capable of preventing dishing, erosion or scratching, and improving process reliability and device electrical characteristics. |
| priorityDate | 2001-06-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 23.