http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100365424-B1
Outgoing Links
Predicate | Object |
---|---|
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31105 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76802 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
filingDate | 1998-10-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2003-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2003-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-100365424-B1 |
titleOfInvention | Method of forming interconnection line for semiconductor device |
abstract | The present invention provides a method for forming metal wirings of highly integrated semiconductor devices that can accurately define via holes while reducing internal capacitance.n n n According to another aspect of the present invention, there is provided a method of forming a metal wiring of a semiconductor device, the method including: forming an SOG film on a semiconductor substrate on which a conductive film pattern is formed; Etching the SOG film to expose the surface of the conductive film pattern; Curing the surface of the SOG film; Forming an interlayer insulating film over the entire substrate; And forming a via hole by etching the insulating film so that a portion of the conductive film pattern is exposed. In this embodiment, the curing step proceeds to electron beam curing or oxygen plasma curing. |
priorityDate | 1998-10-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 15.