http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100358051-B1
Outgoing Links
Predicate | Object |
---|---|
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31116 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02118 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
filingDate | 1999-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2002-10-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2002-10-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-100358051-B1 |
titleOfInvention | A method of forming a metal line in a semiconductor device |
abstract | The present invention relates to a method for forming a metal wiring of a semiconductor device, the semiconductor substrate having a lower wiring is provided, an organic oxide film is formed on the lower wiring, the first inorganic oxide film is formed on the organic oxide film, the first A second inorganic oxide film is formed on the inorganic oxide film, a trench is formed in the second inorganic oxide film to expose the first inorganic oxide film, a first via plug hole is formed in the trench to expose the organic oxide film, and the lower wiring is exposed. By forming a secondary via plug hole as much as possible, forming a copper layer filling the secondary via plug hole, and etching the copper layer to form a copper wiring, high aspect ratio and low dielectric constant can be realized. |
priorityDate | 1999-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 17.