http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100331269-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-482 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205 |
| filingDate | 1999-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2002-04-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2002-04-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100331269-B1 |
| titleOfInvention | Method for forming line of a semiconductor device |
| abstract | The present invention is a phenomenon in which the doped polysilicon or tungsten silicide or polyside thin film wiring used as a conductive wiring is deformed at a subsequent thermal process by performing a thermal process before patterning the wiring in order to prevent the phenomenon of deformation by a subsequent thermal process. A method of forming a wiring of a semiconductor device with a minimum of steps, the method comprising: forming a bit line and then forming a conductive thin film 40 for a bit line, and depositing a mask oxide film 60 on the entire conductive thin film 40. After the conductive thin film 40 is formed, or during the deposition of the mask oxide film 60, or after the deposition of the mask oxide film 60, a step of performing a heat treatment process is performed through the mask oxide film 60. Patterning the bit line and proceeding the process later, it is possible to suppress the occurrence of misalignment when forming the wiring There is. |
| priorityDate | 1999-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 24.