http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100305686-B1

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_4c30e8a2248ee5bef57f852132563d86
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31053
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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-20
filingDate 1997-09-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2001-10-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4897d255fe166329d44c8329b302cd11
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publicationDate 2001-10-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-100305686-B1
titleOfInvention Single crystal line structure SOI wafer and its manufacturing method
abstract The present invention utilizes a direct-junction silicon on insulator (SOI) substrate manufacturing technique and a technique for selectively etching silicon to provide a single crystal line structure having an SOI substrate structure in which the width of the silicon single crystal line is gradually narrowed in the longitudinal direction of the substrate. An SOI wafer and a method of manufacturing the same. The SOI wafer of the single crystal line structure according to the present invention comprises a silicon substrate used as an auxiliary wafer, an oxide film produced when the substrate is oxidized, and a thinner to wider surface from the silicon wafer direct bonding interface to the surface on the oxide film. A silicon single crystal line having a shape and an insulating film for separating the silicon single crystal line from each other, and the method of manufacturing an SOI wafer according to the present invention is performed by a photolithography method after forming an oxide film on a surface of a silicon substrate used as a main wafer. Selectively removing and performing an anisotropic etching or isotropic etching process by a dry etching method or a wet etching method, performing a standard washing process after the process, performing a thermal oxidation process, and performing a low pressure vapor deposition after the process. Or by the manufacturing process method of performing the TEOS process and the planarization process after the process. And the step of directly bonding the mirror surfaces of the produced main wafer and the auxiliary wafer to face each other and performing a heat treatment step, and then performing a step of thinning the film to a predetermined thickness from the back surface of the directly bonded main wafer. A single crystal line structure SOI wafer can be manufactured.
priorityDate 1997-09-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 28.