http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100230119-B1

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filingDate 1996-12-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 1999-11-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b0628c462bacb33e28a10c2b7b78408f
publicationDate 1999-11-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-100230119-B1
titleOfInvention Improved interconnect layer structure and its manufacturing method in semiconductor integrated circuit device having macro cell region
abstract The interconnect layer extends at least across the macro cell region and at least across circuit regions that are different from the macro cell region, wherein the macro cell region and the circuit region are integrally integrated into a semiconductor device, the interconnect layer in the macro cell region Is thinner than the interconnect layer in the circuit area.
priorityDate 1995-12-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 25.