http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100201041-B1

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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-318541
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-00
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-3185
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F11-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28
filingDate 1996-08-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 1999-06-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7c855d60c818610cca1b691e85c1579f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7296e51238fff1609df6140c3842db90
publicationDate 1999-06-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-100201041-B1
titleOfInvention Scan Path Configuration Circuit
abstract The connection circuit CC is constituted by the selectors 2, 3 and the flip-flop 4, the selector 2 is controlled by the test holding control signal thld, and the selector 3 is controlled by the shift mode control signal sm. Is executed, the scan-in terminal si is connected to the data input 0 terminal of the selector 2, the output terminal of the flip-flop 4 is connected to the data input 1 terminal, and the output terminal of the selector 2 is connected to the selector 3. The input terminal d is connected to the data input 0 terminal of the selector 3, the output terminal of the selector 3 is connected to the input terminal of the flip-flop 4, The output terminal is also connected to the capture-out terminal so and the output terminal q of the connection circuit CC. In normal operation, data is input using the input terminal d. Thus, a scan path configuration circuit is provided in which high speed operation is obtained in normal operation.
priorityDate 1995-12-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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