http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100190069-B1

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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28518
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
filingDate 1996-07-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 1999-06-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8f1bd6a6b366f7166fcfafc1065a6558
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f8b5d6cf1123c525760ec52c26b8109b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8359737e329c58e168972aee91292c88
publicationDate 1999-06-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-100190069-B1
titleOfInvention Method for forming metal silicide layer of semiconductor device
abstract The present invention forms a second spacer as an insulating film capable of forming a more stable bond than silicon atoms in a thermodynamic manner containing no silicon atoms (Si) on the entire surface of the first spacer formed of a nitride film or a silicon oxide film. Subsequently, a metal layer is formed on the entire surface of the resultant, followed by RTP treatment to form a metal silicide layer.n n n Accordingly, in the conventional method of forming the metal silicide layer of the semiconductor device, the metal silicide layer is partially formed on the first spacer of the gate electrode, whereas in the present invention, the metal silicide layer is formed on the entire surface of the first spacer. This prevents a short from being formed between the gate electrode, the source, and the drain.
priorityDate 1996-07-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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