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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-413
filingDate 2009-12-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2013-05-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-WO2011077492-A1
titleOfInvention Semiconductor memory and system
abstract A semiconductor memory includes a sense amplifier that amplifies data read from a real memory cell in response to activation of a sense amplifier enable signal, and a plurality of dummy memory cells connected in parallel, and a plurality of replicas connected in series. In response to data read from the dummy memory cell in the replica part of the preceding stage, and a replica circuit in which the dummy memory cell of the corresponding replica part is read-accessed and the replica part of the first stage in response to the read command And an operation control circuit for activating a dummy access signal for reading and accessing the dummy memory cell and activating a sense amplifier enable signal in response to data read from the replica portion at the final stage. Thereby, variation in transistor characteristics of the dummy memory cells can be averaged, and the activation timing of the sense amplifier can be optimized.
priorityDate 2009-12-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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