http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-WO2010032699-A1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L7-033 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L25-061 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L25-03878 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L25-067 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-089 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-085 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L25-497 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L25-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L7-02 |
| filingDate | 2009-09-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2012-02-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-WO2010032699-A1 |
| titleOfInvention | Clock recovery circuit and clock recovery method |
| abstract | An input signal having a binary waveform is reproduced at high speed and with low power consumption. An equalization circuit that equalizes an input signal having a binary waveform to a duobinary signal, discriminates the level of the duobinary signal with respect to a plurality of threshold values at the timing of the symbol rate clock signal, and outputs a discrimination result, and based on the discrimination result A phase comparison circuit that outputs a phase comparison result representing a phase shift of the symbol rate clock signal, and a phase adjustment circuit that increases or decreases the period of the symbol rate clock signal based on the phase comparison result. (Figure 1) |
| priorityDate | 2008-09-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 21.