http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-S63231621-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e5db580deca7130dbe51805c6c608b35 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F7-52 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F7-535 |
| filingDate | 1987-03-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ab72f11185c7cb61eb3631dccc3cfe07 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_041477875832fb59c9348729a768a277 |
| publicationDate | 1988-09-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-S63231621-A |
| titleOfInvention | Arithmetic processing unit |
| abstract | PURPOSE: To shorten the dividing operation execution time per one divider by the time corresponding to one clock in comparison with a conventional system by adding a partial quotient forecasting circuit and a data selecting circuit. n CONSTITUTION: A first partial quotient forecasting circuit 20 calculates a first forecasted quotient at the time of inputting data (a dividend and a divisor) to a pipeline operation processing device. The output of the first partial quotient forecasting circuit 20 is set to a partial quotient register 16 and a multiple register 12 through selecting circuits 22 and 21 respectively at the time of setting the dividend and the divisor to a dividend register 10 and a divisor register 11 respectively. Thus, the dividing operation execution time is shortened to realize an arithmetic processing unit higher in speed. n COPYRIGHT: (C)1988,JPO&Japio |
| priorityDate | 1987-03-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID3033151 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419499693 |
Total number of triples: 14.