http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-S62200765-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38520f366e74704305b34fb93a81121e |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate | 1986-02-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9cac272f3ec21cec0a082bf195612eb5 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d89f882de787b8907b57b0a5b6113ab6 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_dd78231cd4a81001697bc173668fef81 |
| publicationDate | 1987-09-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-S62200765-A |
| titleOfInvention | Manufacture of semiconductor element |
| abstract | PURPOSE: To enable the attainment of high integration and to obtain a semiconductor element of high reliability, by forming a high-melting metal film by a bias sputtering method so as to prevent the formation of the metal film in a stepped portion and thereby to prevent the formation of silicide on a silicon oxide film. n CONSTITUTION: After a field oxide film 22 is formed selectively on the surface of an Si substrate 21, a silicon oxide film 25 is formed on the exposed surface of the Si substrate 21, and a polycrystalline Si film 26 is formed on the film 25 and then removed selectively to form a gate electrode. Next, a silicon oxide film is formed on the whole surface, and arsenic is implanted by anisotropic etching with the silicon oxide film 27 left only on the lateral side of the gate electrode, so as to form source and drain diffused layers 28 and 29. Then, a high-melting metal film 20 is deposited on a part other than a stepped portion by a bias sputtering method and subjected to heat treatment so that it be made into silicide 31 on the gate electrode and the diffused layers, and the metal film not made into silicide is removed. Subsequently, a phosphorus-doped silicon oxide film 32 is formed as an intermediate insulating film, a contact hole is formed at a desired position thereof, and thereafter a metal film 33 for wiring is deposited and patterned for wiring. n COPYRIGHT: (C)1987,JPO&Japio |
| priorityDate | 1986-02-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 17.