http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-S60136264-A

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filingDate 1983-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_edad36c423e9218b3a73c5cb99d293c5
publicationDate 1985-07-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-S60136264-A
titleOfInvention Manufacture of semiconductor device
abstract PURPOSE:To obtain a GaAs MES FET of good controllability of threshold voltage, good uniformity in a wafer, and good controllability of electrode voltages by a method wherein a high carrier concentration layer for source and drain contact is formed to epitaxial growth after a gate electrode is formed on an active layer. CONSTITUTION:The part except the gate part and source and drain regions where a high carrier concentration contact layer is to be formed is covered with an SiO2 film 5. At this time, the size of the SiO2 in the periphery of the gate is adjusted so that desired withstand voltages can be obtained between the gate and source and between the gate and drain. Thereafter, the selective epitaxial growth of contact layers 6 is carried out. A method of the selective epitaxial growth is the use of thermal decomposition of an organic metal and arsine. However, hydrogen chloride is introduced at the time of growth in order to epitaxially grow selectively only at the GaAs exposure part. Then, high carrier concentration epitaxial layers can be obtained selectively only at the regions of forming source and drain electrodes by adjusting the amount of introduction of the organic metal and the hydrogen chloride. Finally, ohmic electrodes 7 are formed at the source and drain regions by Au-Ge evaporation.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H025437-A
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Total number of triples: 24.